The invention relates generally to manufacturing of semiconductor devices and more particularly to the patterning of semiconductor films in the manufacture of arrays of transistors for use in display devices.
The fabrication of all-printed backplanes on polymeric substrates through use of solvent-based inks offers the potential for lower cost, flexible, or large area displays. There are numerous potential applications for such displays, such as rolled displays, affordable large area displays, displays incorporated into fabrics, and as a paper substitute. Unfortunately, many problems remain in the development of thin-film transistor (xe2x80x9cTFTxe2x80x9d) arrays used for addressing in such displays.
Organic semiconductor materials or dispersions of inorganic semiconducting particles lend themselves to relatively simple and inexpensive deposition methods. Possible methods include thermal evaporation in a vacuum chamber or wet processing such as spin coating using an appropriate solvent or by other coating techniques known to yield thin films.
Some deposition techniques have the advantage of forming thin films of organic semiconductor that have desirable properties such as a high field effect mobility for the dominant charge carrier in the film. For example, it is known that vacuum deposition of oligothiophenes such as xcex1-sexithiophene, or xcex1, xcfx89-dihexyl quaterthiophene under proper processing conditions, gives films that exhibit a high field effect mobility.
Unfortunately, wet deposition processes do not readily permit patterning of the film because the wet material is generally distributed over the entire substrate. Vacuum deposition can be done in a patterned way using, for example, of a contact mask. Fine details, however, are difficult to pattern because of resolution limits of contact masks for vacuum deposition. Well established silicon-based device patterning methods, such as photolithography, are relatively complex and expensive. Such patterning methods conflict with the desire to manufacture relatively inexpensive arrays of transistors.
What are needed are relatively simple, low cost manufacturing methods for production of patterned semiconductor films to help realize the advantages of large array and flexible displays.
The present invention provides a method to pattern semiconductor layers, in particular for use in the manufacture of lower cost, larger area transistor arrays. Use of lower cost deposition methods, such as printing techniques, enables realization of the benefits of large area displays, in particular displays employing an encapsulated electrophoretic display medium.
One embodiment of a process for forming a patterned semiconductor film comprises providing a substrate and an organic semiconductor film adjacent to the substrate. A destructive agent is deposited adjacent to selected portions of the organic semiconductor film where the destructive agent is chosen to change a property of selected portions of the organic semiconductor film substantially through the full thickness of the organic semiconductor film.
The destructive agent can comprise a solvent that serves to dissolve neighboring portions of the organic semiconductor layer. Other materials can be employed to cause gross damage to portions of the semiconductor layer, such as an oxidizer to cause oxidation of the neighboring portions of the semiconductor layer.
Alternatively, a portion of the destructive agent can diffuse into neighboring portions of the organic semiconductor film and impair the electrical properties of those portions of the film. Damaged portions of the organic semiconductor film preferably have reduced conductivity and may act as an insulator. These portions provide electrical isolation between neighboring transistors in an array.
The destructive agent can further comprise a gelling agent. The gelling agent assists, for example, in deposition of the destructive agent via printing methods.
In another embodiment, a method for manufacturing a transistor comprises the provision of a substrate and a gate electrode adjacent to the substrate. A gate dielectric is deposited adjacent to the substrate and the gate electrode. Source and drain electrodes are deposited adjacent to the gate dielectric. A mask is deposited adjacent to the gate dielectric in a pattern such that the source electrode, the drain electrode, and a portion of the gate dielectric remain exposed and a semiconductor layer comprising one of an organic semiconductor and a plurality of inorganic colloidal particles is deposited adjacent to the source electrode, the drain electrode, the portion of the gate dielectric and the mask, thereby forming the transistor, the semiconductor layer having a thickness less than a thickness of the mask. In some embodiments, the thickness of the semiconductor layer is 1/50 to 1/1000 of the thickness of the mask.
In some bottom contact transistor embodiments, the mask need not be removed since it can disrupt the continuity of the semiconductor layer between neighboring transistors. The mask further leads to an effective increase in the spacing between neighboring transistors. These effects can reduce leakage currents between transistors.
The invention can assist all-printed fabrication of display devices. Patterning of the semiconductor layer can be accomplished through use of techniques such as silk screening or stamping. The invention has particular application in the fabrication of large area, flexible lower cost displays that incorporate a microencapsulated electrophoretic display medium.